The present invention relates to tag matching for messages in computing nodes that include hardware capable of performing tag matching, and more specifically, to enabling more efficient and continuous tag matching in hardware.
High-performance computing (HPC) systems utilize parallel processing for running advanced application programs efficiently, reliably and quickly. To meet the needs of scientific research and engineering simulations, HPC systems are growing in size and scale and are connected by networks. Current network adapters for the HPC computing nodes (e.g., InfiniBand (IB) adapters) support hardware matching of tags in incoming messages.
However, even with hardware matching there are typical restrictions in network adapter technologies. For example, the network adapters may not efficiently manage wild card messages and unexpected messages that could be received from any given source on a computing node, resulting in disabled hardware tag matching. This results in less efficient processing of messages at the computing node, even while the hardware tag matching is meant to improve the processing.